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Low Power Design of the Processer Based on Architecture Modifications

M Jasmin

In the recent era as the devices are shrinking down low power design methodologies are of greater importance.A CGRA that is focused on data path computations for a particular application domain is a balancing act akin to design an ASIC and a FPGA simultaneously. Narrowing the application domain significantly makes the design of the CGRA very much like that of a programmable ASIC. Widening the application domain requires a more flexible data path that requires more configurable over head and has less overall efficiency compared to an FPGA.So A reconfigurable architecture is used with modified architecture in ALU arrays, there by reducing power. The Architecture presented is replaceable to all processors including DSP processors .