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A Novel Approach to Condense the Leakage Power in Deep Submicron Circuits by Sleep Methods

R.Padmasena, R.Kalyan, V.Keerthy Rai

It is very important for any circuit to dissipate low power. As the low power dissipation circuits are most popular now a days when the scaling of the circuit increases the leakage power also increases rapidly in the circuit. So, for decreasing these kinds of leakages and to provide a better power efficiency there are many types of power gating techniques. In this paper a novel approach to analyse the different types of flip-flops using different types of power gated circuits using low power VLSI design techniques are presented. And also the comparison results between all the methods also presented. The power gating techniques used in this paper are Fine-grain power gating, Coarse-grain power gating. Different stack methods used in this paper are sleepy stack, Dual sleep and Dual stack method.